
PIC16F946
DS41265A-page 254
Preliminary
2005 Microchip Technology Inc.
TABLE 19-16: PIC16F946 A/D CONVERSION REQUIREMENTS
Standard Operating Conditions (unless otherwise stated)
Operating Temperature
-40°C
≤ TA ≤ +125°C
Param
No.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
130
TAD
A/D Clock Period(2)
1.6
—
μsTOSC-based, VREF ≥ 3.0V
3.0*
—
μsTOSC-based, VREF full range
130
TAD
A/D Internal RC
Oscillator Period
3.0*
6.0
9.0*
μs
ADCS<1:0> = 11 (RC mode)
At VDD = 2.5V
2.0*
4.0
6.0*
μsAt VDD = 5.0V
131
TCNV
Conversion Time
(not including
Acquisition Time)(1)
—11
—
TAD
Set GO/DONE bit to new data in A/D
Result register
132
TACQ
Acquisition Time
5*
11.5
—
μs
μs The minimum time is the amplifier
settling time. This may be used if the
“new” input voltage has not changed
by more than 1 LSb (i.e., 4.1 mV @
4.096V) from the last sampled
voltage (as stored on CHOLD).
134
TGO
Q4 to A/D Clock
Start
—TOSC/2
—
If the A/D clock source is selected as
RC, a time of TCY is added before
the A/D clock starts. This allows the
SLEEP
instruction to be executed.
*
These parameters are characterized but not tested.
Data in ‘Typ’ column is at 5V, 25
°C unless otherwise stated. These parameters are for design guidance
only and are not tested.
Note 1:
ADRESH and ADRESL registers may be read on the following TCY cycle.
2: